Much like Ampere, each SM contains 4 Tensor cores but Lovelace contains a greater number of Tensor cores overall given its increased number of SMs. Lovelace's new fourth-generation Tensor cores enable the AI technology used in DLSS 3's frame generation techniques. Ī new stage in the ray tracing pipeline called Shader Execution Reordering (SER) is added in the Lovelace architecture which Nvidia claims provides a 2x performance improvement in ray tracing workloads. These 128 RT cores can provide up to 191 TFLOPS of compute with 1.49 TFLOPS per RT core. The RTX 4090 features 128 RT cores compared to the 84 in the previous generation RTX 3090 Ti. Streaming multiprocessors (SMs) CUDA cores Īda Lovelace features third-generation RT cores Nvidia video encoder/decoder (NVENC/NVDEC) with 8K 10-bit 60FPS AV1 fixed function hardware encoding.3rd-generation Ray Tracing Cores, plus concurrent ray tracing and shading and compute.4th-generation Tensor Cores with FP8, FP16, bfloat16, TensorFloat-32 (TF32) and sparsity acceleration.TSMC 4N process (custom designed for NVIDIA) - not to be confused with TSMC's regular N4 node.Architectural details Īrchitectural improvements of the Ada Lovelace architecture include the following: The Ada Lovelace architecture was announced by Nvidia CEO Jensen Huang during a GTC 2022 keynote on Septemwith the architecture powering Nvidia's GPUs for gaming, workstations and datacenters. The Ada Lovelace architecture follows on from the Ampere architecture that was released in 2020. Photograph of Ada Lovelace, eponym of the architecture Background
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